Error correction is a key component of tomorrow’s large scale quantum computers. Using error correction, we can combine many “physical qubits” (in our devices, these are small superconducting circuits that can store quantum information, but are sensitive to noise) into an ensemble that works together to store a single “logical qubit” that is more robust to noise. Just a few months ago, we announced that we had implemented a surface code quantum error correction experiment that exceeded the performance threshold required to get benefits from scaling up the system. This means that, in principle, we can now make a near-perfect logical qubit by “simply” adding more and more physical qubits.
Thinking ahead to the next steps in this journey raises the following questions:
- How can we minimize the number of physical qubits per logical qubit?
- How can we maximize the speed of logical operations and quantum algorithms?
One way to make progress on both these questions, exemplified by the release of our Willow chip, is to improve the quality of the physical qubits (i.e., lower physical error rates). This reduces the required code distance (i.e. the minimum number of simultaneous physical errors required to produce a logical error) leading to fewer physical qubits per logical qubit and faster logical operations, which generally scale with the code distance. However, another way is to make the error correction code more efficient.
Today, we are excited to report the experimental demonstration of a “color code” system that provides an advantageous alternative to the well studied surface code. In our latest Nature publication, “Scaling and logic in the color code on a superconducting quantum processor”, we implement the building blocks required for a resource efficient, fault-tolerant quantum computer based on the color code. Just like the surface code, the color code is a way to encode each logical qubit using many physical qubits in such a way that errors can be detected and corrected as they occur. However, the color code uses a different geometrical pattern of parity measurement (i.e., a triangular patch of hexagonal tiles) which requires fewer physical qubits and boasts more efficient logical gates than the surface code, but this comes at the expense of requiring deeper physical circuits and a different decoding algorithm.